01435nab a2200205 i 4500 BPP BPK 20151207142149.0 151207s2002 sz | | |000 ||eng BPK eng CHE PAWŁOWSKI, Piotr. 1996 - . Politechnika Koszalińska - Wydział Elektroniki, Katedra Systemów Elektronicznych Current mode digital gates for mixed mode reprogrammable integrated system / Piotr Pawłowski. 2002. Dane z Informatora o publikowanych wynikach prac naukowo-badawczych w 2002 roku Wydziału Elektroniki. This paper presents some aspects of building reprogrammable system using current mode gates. With this approach it is possible to extend system on a chip solutions into the area of mixed mode applications. CMOS current mode gates consume almost constant current from mode operations. Contrary to voltage mode digital gates, presented in the paper current mode gates do not produce strong voltage and current fluctuations in the common substrate of the SoC. Paper shows three generations of current mode gates. It is described, in which way static noise margins were archieved in this technique, from the basic concept to the advanced design. Results of PSPICE simulations, based on BSIM3v# models, are presented as well as a report of ASIC chip tests. W : IEEE. - ART UKD 111 111