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  <titleInfo>
    <title>CAD-environment for deriving of application specific system architectures</title>
  </titleInfo>
  <name type="personal">
    <namePart>Maslennikow, Oleg</namePart>
    <namePart type="termsOfAddress">Politechnika Koszalińska - Wydział Elektroniki, Katedra Inżynierii Komputerowej</namePart>
    <namePart type="date">1996 - 2010</namePart>
    <role>
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  <name type="personal">
    <namePart>WĄSIK, Andrzej.</namePart>
    <namePart type="termsOfAddress">Politechnika Koszalińska - Wydział Elektroniki, Katedra Inżynierii Komputerowej</namePart>
    <namePart type="date">1998 - 2001</namePart>
  </name>
  <name type="personal">
    <namePart>KANYEVSKYY, Yuriy.</namePart>
    <namePart type="termsOfAddress">Politechnika Koszalińska - Wydział Elektroniki, Katedra Inżynierii Komputerowej</namePart>
    <namePart type="date">1996 - 2001</namePart>
  </name>
  <name type="personal">
    <namePart>Maslennikowa, Natalia</namePart>
    <namePart type="termsOfAddress">Politechnika Koszalińska - Wydział Elektroniki, Katedra Inżynierii Komputerowej</namePart>
    <namePart type="date">1999 -</namePart>
  </name>
  <name type="conference">
    <namePart>International Conference on Signals and Electronic Systems ICSES 2000 (2000 ; Ustroń, Polska).</namePart>
  </name>
  <typeOfResource>text</typeOfResource>
  <genre authority="marc">conference publication</genre>
  <genre authority="">Materiały konferencyjne.</genre>
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    <dateIssued>2000</dateIssued>
    <issuance>monographic</issuance>
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    <languageTerm authority="iso639-2b" type="code">eng</languageTerm>
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  <abstract>The program environment for automatic designing of the application specific parallel architectures is proposed. The environment allows to construct and to visualize the dependence graph of algorithms given by nested loops, and then mapping of these algorithms onto corresponding processor array architectures with desired parameters. The environment may be used for designing and optimization of application-specific parallel architectures destined for further realization in FPGA or as ASIC.</abstract>
  <targetAudience authority="marctarget">specialized</targetAudience>
  <note type="statement of responsibility">Oleg Maslennikow, Andrzej Wąsik, Jerzy Kaniewski, Natalia Maslennikova.</note>
  <note>Dane z Informatora o publikowanych wynikach prac naukowo-badawczych w 2000 roku Wydziału Elektroniki.</note>
  <subject authority="lcsh">
    <topic>Algorytmy genetyczne</topic>
  </subject>
  <subject authority="lcsh">
    <topic>Projektowanie - oprogramowanie</topic>
  </subject>
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    <titleInfo>
      <title>International Conference on Signals and Electronic Systems. -</title>
    </titleInfo>
    <part>
      <text>2000, s. 465-470</text>
    </part>
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