<?xml version="1.0" encoding="UTF-8"?>
<record
    xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
    xsi:schemaLocation="http://www.loc.gov/MARC21/slim http://www.loc.gov/standards/marcxml/schema/MARC21slim.xsd"
    xmlns="http://www.loc.gov/MARC21/slim">

  <leader>01440naa a2200241 i 4500</leader>
  <controlfield tag="001">BPP</controlfield>
  <controlfield tag="003">BPK</controlfield>
  <controlfield tag="005">20180427075032.0</controlfield>
  <controlfield tag="008">151202s2000    CHE    f     |100 0 eng</controlfield>
  <datafield tag="040" ind1=" " ind2=" ">
    <subfield code="c">BPK</subfield>
  </datafield>
  <datafield tag="041" ind1=" " ind2=" ">
    <subfield code="a">eng</subfield>
  </datafield>
  <datafield tag="044" ind1=" " ind2=" ">
    <subfield code="a">CHE</subfield>
  </datafield>
  <datafield tag="100" ind1=" " ind2=" ">
    <subfield code="a">WAWRYN, Krzysztof.</subfield>
    <subfield code="d">1996 - .</subfield>
    <subfield code="b">Politechnika Koszali&#x144;ska - Wydzia&#x142; Elektroniki,</subfield>
    <subfield code="c">Katedra System&#xF3;w Cyfrowego Przetwarzania Sygna&#x142;&#xF3;w</subfield>
  </datafield>
  <datafield tag="245" ind1=" " ind2=" ">
    <subfield code="a">Current mode circuit for programmable neural networks /</subfield>
    <subfield code="c">Krzysztof Wawryn, Andrzej Mazurek.</subfield>
  </datafield>
  <datafield tag="260" ind1=" " ind2=" ">
    <subfield code="c">2000.</subfield>
  </datafield>
  <datafield tag="500" ind1=" " ind2=" ">
    <subfield code="a">Dane z Informatora o publikowanych wynikach prac naukowo-badawczych w 2000 roku Wydzia&#x142;u Elektroniki.</subfield>
  </datafield>
  <datafield tag="520" ind1=" " ind2=" ">
    <subfield code="a">In this paper novel AB class neuron structures that set foundations for low power VLSI neural networks and other applications are proposed. The analog AB class circuits for activation function and programmable weight synaptic connections are presented and discussed. A qualitative comparison is made between standard and proposed circuits.</subfield>
  </datafield>
  <datafield tag="655" ind1=" " ind2="0">
    <subfield code="a">Materia&#x142;y konferencyjne.</subfield>
  </datafield>
  <datafield tag="700" ind1=" " ind2=" ">
    <subfield code="a">MAZUREK, Andrzej.</subfield>
    <subfield code="d">1996 - .</subfield>
    <subfield code="b">Politechnika Koszali&#x144;ska - Wydzia&#x142; Elektroniki,</subfield>
    <subfield code="c">Katedra Teorii Obwod&#xF3;w i Uk&#x142;ad&#xF3;w Elektronicznych</subfield>
  </datafield>
  <datafield tag="711" ind1=" " ind2=" ">
    <subfield code="a">IEEE International Symposium on Circuits and Systems ISCAS 2000</subfield>
    <subfield code="d">(2000 ;</subfield>
    <subfield code="c">Genewa, Szwajcaria).</subfield>
    <subfield code="p">ISCAS 2000</subfield>
  </datafield>
  <datafield tag="773" ind1=" " ind2=" ">
    <subfield code="i">W :</subfield>
    <subfield code="t">IEEE International Symposium on Circuits and Systems. -</subfield>
    <subfield code="g">2000, Vol. 3, s. 678-681</subfield>
  </datafield>
  <datafield tag="942" ind1=" " ind2=" ">
    <subfield code="c">ART</subfield>
    <subfield code="2">UKD</subfield>
  </datafield>
  <datafield tag="999" ind1=" " ind2=" ">
    <subfield code="c">379</subfield>
    <subfield code="d">379</subfield>
  </datafield>
</record>
