SUSZYŃSKI, Robert. Politechnika Koszalińska - Wydział Elektroniki i Informatyki, Katedra Systemów Cyfrowego Przetwarzania Sygnałów 1996 - creator WAWRYN, Krzysztof. Politechnika Koszalińska - Wydział Elektroniki i Informatyki, Katedra Systemów Cyfrowego Przetwarzania Sygnałów 1996 - IEEE International Midwest Symposium on Circuits and Systems MWSCAS 2011 2011 ; Seoul, Korea Południowa). text conference publication kr 2011 continuing eng A low power low voltage current mode 9-bit pipelined a/d converter and 8-bit self-calibrated d/a converter to interface a DSP system are presented in the paper. The a/d converter is built of 1.5 bit stages with digital error correction logic. The self-calibrated d/a converter is composed of M LSBs fine and N MSBs coarse current mode converters. The a/d and d/a converters were designed in 0.35μm technology, then fabricated to verify proposed concept. Performances of both converters are compared to performances of known converter structures. Low power consumption and small chip area are advantages of the proposed converters. Robert Suszyński, Krzysztof Wawryn. Original article Original article presents the results of original research or experiment Oryginalny artykuł naukowy Oryginalny artykuł naukowy przedstawia rezultaty oryginalnych badań naukowych lub eksperymentu analogue-digital conversion current-mode logic digital signal processing chips digital-analogue conversion low-power electronics pipeline processing|en IEEE, 2011. - 1548-3746 PBN-ID 160308 20180209110920.0