000			01435nab a2200205 i 4500
001			BPP
003			BPK
005			20151207142149.0
008			151207s2002 sz | | |000 ||eng
040			_cBPK
041			_aeng
044			_aCHE
100			_aPAWŁOWSKI, Piotr. _d1996 - . _bPolitechnika Koszalińska - Wydział Elektroniki, _cKatedra Systemów Elektronicznych
245			_aCurrent mode digital gates for mixed mode reprogrammable integrated system / _cPiotr Pawłowski.
260			_c2002.
500			_aDane z Informatora o publikowanych wynikach prac naukowo-badawczych w 2002 roku Wydziału Elektroniki.
520			_aThis paper presents some aspects of building reprogrammable system using current mode gates. With this approach it is possible to extend system on a chip solutions into the area of mixed mode applications. CMOS current mode gates consume almost constant current from mode operations. Contrary to voltage mode digital gates, presented in the paper current mode gates do not produce strong voltage and current fluctuations in the common substrate of the SoC. Paper shows three generations of current mode gates. It is described, in which way static noise margins were archieved in this technique, from the basic concept to the advanced design. Results of PSPICE simulations, based on BSIM3v# models, are presented as well as a report of ASIC chip tests.
773			_iW : _tIEEE. -
942			_cART _2UKD
999			_c111 _d111